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SMIC provides electrostatic protection services, marking SMIC's professionalism, standards, advanced and comprehensive

July 30, 2022

Help customers strengthen full-chip ESD design


SMIC International IC Manufacturing Co., Ltd. announced that it will provide chip design customers with a complete set of electrostatic discharge (ESD) protection design services including documentation, checklists, PERC tools, layout inspection and risk management services to help customers strengthen The chip ESD protection design ensures that it is successfully released in one shot.

SMIC provides electrostatic protection services, marking SMIC's professionalism, standards, advanced and comprehensive



With the rapid advancement of semiconductor manufacturing process technology, device size has been developed to below 65 nm, and electrostatic discharge has become an increasingly serious and challenging problem. It is difficult to rely solely on the I/O protection design of the input/output unit (I/O) itself, especially in the interface circuit portion across the power domain. As gate oxides become thinner and more susceptible to damage as processes progress, designers are increasingly concerned with ESD protection issues. Therefore, the full-chip ESD design concept has received attention.

To help customers cope with ESD risks and implement a full-chip ESD design concept, SMIC provides three ESD protection lines: First, provide a complete set of documentation and checklists for SMIC's different process processes. The stage must follow the chip-level ESD protection design; secondly, provide a new automatic inspection code based on Mentor PERC, which can automatically perform chip-level ESD protection check before the customer casts the film; finally, equally important, SMIC Provide ESD layout check and risk management services according to customer requirements. For customers using SMIC's I/O library, the layout layout inspection service includes I/O applications, ESD-related placement and routing, and final layout inspection. All of the above solutions are to improve the ESD protection performance of the chip.

“At this stage, good ESD protection is the result of a strong I/O design service capability from the foundry, a customer's full-chip ESD protection plan, and IP-level ESD protection from third-party IP providers.” Dr. Tang Tianshen, Senior Vice President of Core International Design Service Center, said: “SMIC has spared no effort to ensure that customers can easily use all ESD protection solutions. A few years ago, SMIC took the lead in the industry to develop this aspect as a whole and comprehensive. Research work. Not only cooperate with industry experts and suppliers to solve technical problems, but also carry out ESD protection design and inspection process and business model exploration and practice with important customers, and accumulated a lot of successful experience. In 2013, we handled the ESD layout. The pass rate of layout inspection cases exceeded 95%. On the basis of successful trial operation, SMIC officially announced the launch of a full range of electrostatic discharge (ESD) protection design services, which indicates that SMIC's ability to design customer service has changed. Be more professional, standard, advanced and comprehensive."


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